Expertises
Engineering & Materials Science
# Clocks
# Digital Filters
# Feedback
# Poles
# Poles And Zeros
# Pulse Width Modulation
# Signal Interference
# Topology
Publicaties
Recent
Lokin, C. E. (2023).
Active PWM ripple reduction in class-D amplifiers using digital loop filters. [PhD Thesis - Research UT, graduation UT, University of Twente]. University of Twente.
https://doi.org/10.3990/1.9789036555678
Lokin, C. E., Schinkel, D.
, van der Zee, R. A. R.
, & Nauta, B. (2021).
Compensating processing delay in excess of one clock cycle in noise shaping loops without altering the filter topology.
IEEE Access,
9, 108101-108111. [9502711].
https://doi.org/10.1109/ACCESS.2021.3101574
Lokin, C. E.
, van der Zee, R. A. R.
, Schinkel, D.
, & Nauta, B. (2020).
EMI reduction in Class-D amplifiers by actively reducing PWM ripple.
IEEE transactions on circuits and systems I: regular papers,
67(3), 765-773. [8913516].
https://doi.org/10.1109/TCSI.2019.2952543
Bindra, H. S.
, Lokin, C. E.
, Schinkel, D.
, Annema, A. J.
, & Nauta, B. (2018).
A 1.2-V Dynamic bias latch-type comparator in 65-nm CMOS with 0.4-mV input noise.
IEEE journal of solid-state circuits,
53(7), 1902-1912.
https://doi.org/10.1109/JSSC.2018.2820147
Verbonden aan Opleidingen
Bachelor
Contactgegevens
Bezoekadres
Universiteit Twente
Drienerlolaan 5
7522 NB Enschede
Postadres
Universiteit Twente
Postbus 217
7500 AE Enschede