Expertises
Computer Science
- Computing
- Design
- Energy Efficiency
- Standards
- Approximation (Algorithm)
- Flip-Flop
- Simulation
- Vectors
Organisaties
Publicaties
2021
Novel Ultra-Low-Voltage Flip-Flops: Near-Vth Modeling and VLSI IntegrationIn 39th International Conference on Computer Design (ICCD) (pp. 57-65). IEEE. Ranasinghe, A. C. & Gerez, S. H.https://doi.org/10.1109/ICCD53106.2021.00021
2020
MEPNTC: A Standard-Cell Library Design Scheme Extending the Minimum-Energy-Point Operation of Near-Vth ComputingIn Proceedings - 2020 IEEE 38th International Conference on Computer Design, ICCD 2020, Article 9283594 (pp. 96-104). IEEE. Ranasinghe, A. C. & Gerez, S. H.https://doi.org/10.1109/ICCD50377.2020.00032Glitch-Optimized Circuit Blocks for Low-Power High-Performance Booth Multipliers, Article 9149668, 2028-2041. Anuradha Chathuranga Ranasinghe & Gerez, S. H.https://doi.org/10.1109/TVLSI.2020.3009239Ultra-Low Voltage 4-to-2 Compressors for Near-Vth ComputingIn IEEE International Symposium on Circuits and Systems (ISCAS). IEEE. Ranasinghe, A. C. & Gerez, S. H.https://doi.org/10.1109/ISCAS45731.2020.9181126
Onderzoeksprofielen
Vakken collegejaar 2023/2024
Vakken in het huidig collegejaar worden toegevoegd op het moment dat zij definitief zijn in het Osiris systeem. Daarom kan het zijn dat de lijst nog niet compleet is voor het gehele collegejaar.
- 191210750 - System-on-Chip Design
- 191210950 - IDSP
- 191211208 - Internship EE
- 191211219 - Master Thesis Project
- 191211590 - System-on-Chip for Embedded Systems
- 191211650 - Multi-Disciplinary Design Project
- 201600017 - Final Project Preparation
- 201900200 - Final Project EMSYS
- 201900223 - Capita Selecta Electrical Engineering
- 202001162 - Bachelor Thesis EE
- 202001434 - Internship EMSYS
- 202300070 - Final Project EMSYS
Vakken collegejaar 2022/2023
- 191210750 - System-on-Chip Design
- 191210950 - IDSP
- 191211208 - Internship EE
- 191211219 - Master Thesis Project
- 191211590 - System-on-Chip for Embedded Systems
- 191211650 - Multi-Disciplinary Design Project
- 192130022 - Design of Digital Systems
- 201600017 - Final Project Preparation
- 201600187 - Individual Project
- 201900200 - Final Project EMSYS
- 201900223 - Capita Selecta Electrical Engineering
- 202001434 - Internship EMSYS
Adres
![](/.uc/iff4689c40103f3eb1100f2c8f403e85637f06a7b284b0801e3bc0268018041/zilverling.jpg)
Universiteit Twente
Zilverling (gebouwnr. 11), kamer 5033
Hallenweg 19
7522 NH Enschede
Universiteit Twente
Zilverling 5033
Postbus 217
7500 AE Enschede