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dr. T. van Dijk MSc (Tom)

Universitair docent

Expertises

Engineering & Materials Science
Binary Decision Diagrams
Data Structures
Model Checking
Modeling Languages
Specification Languages
Temporal Logic
Mathematics
Decision Diagrams
Model Checking

Publicaties

Recent
van Dijk, T., Abraham, R., & Sickert, S. (2021). Almost-Symbolic Synthesis via Delta-2-Normalisation for Linear Temporal Logic. Paper presented at 10th Workshop on Synthesis.
Monteiro, S., Sokolovas, E., Wittingen, E. , Dijk, T. V. , & Huisman, M. (2021). IntelliJML: A JML plugin for IntelliJ IDEA. In D. R. Cok (Ed.), FTfJP 2021 - Proceedings of the 23rd ACM International Workshop on Formal Techniques for Java-Like Programs, co-located with ECOOP/ISSTA 2021 (pp. 39-42). Association for Computing Machinery (ACM). https://doi.org/10.1145/3464971.3468423
Lijzenga, O. , & van Dijk, T. (2020). Symbolic Parity Game Solvers that Yield Winning Strategies. In J-F. Raskin, & D. Bresolin (Eds.), Proceedings 11th International Symposium on Games, Automata, Logics, and Formal Verification: Brussels, Belgium, September 21-22, 2020 (pp. 18-32). (Electronic Proceedings in Theoretical Computer Science; Vol. 326). Open Publishing Association. https://doi.org/10.4204/EPTCS.326.2
Amparore, E., Berthomieu, B., Ciardo, G., Dal Zilio, S., GallĂ , F., Hillah, L. M., Hulin-Hubard, F., Jensen, P. G., Jezequel, L., Kordon, F., Le Botlan, D., Liebke, T. , Meijer, J., Miner, A., Paviot-Adet, E., Srba, J., Thierry-Mieg, Y. , van Dijk, T., & Wolf, K. (2019). Presentation of the 9th Edition of the Model Checking Contest. In F. Kordon, M. Huisman, B. Steffen, & D. Beyer (Eds.), Tools and Algorithms for the Construction and Analysis of Systems - 25 Years of TACAS: TOOLympics, Held as Part of ETAPS 2019, Proceedings (pp. 50-68). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 11429 LNCS). Springer. https://doi.org/10.1007/978-3-030-17502-3_4
Dijk, T. V., & Rubbens, B. (2019). Simple Fixpoint Iteration To Solve Parity Games. In J. Leroux, & J-F. Raskin (Eds.), Proceedings Tenth International Symposium on Games, Automata, Logics, and Formal Verification, GandALF 2019: Bordeaux, France, 2-3rd September 2019 (pp. 123-139). (Electronic Proceedings in Theoretical Computer Science (EPTCS); Vol. 305). ArXiv. https://doi.org/10.4204/EPTCS.305.9
Dijk, T. V. (2019). A Parity Game Tale of Two Counters. In J. Leroux, & J-F. Raskin (Eds.), Proceedings Tenth International Symposium on Games, Automata, Logics, and Formal Verification, GandALF 2019: Bordeaux, France, 2-3rd September 2019 (pp. 107-122). (Electronic Proceedings in Theoretical Computer Science (EPTCS); Vol. 305). ArXiv. https://doi.org/10.4204/EPTCS.305.8
van Dijk, T. , Meijer, J. , & van de Pol, J. (2019). Multi-core On-The-Fly Saturation. In L. Zhang, & T. Vojnar (Eds.), Tools and Algorithms for the Construction and Analysis of Systems: 25th International Conference, TACAS 2019, Held as Part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2019, Proceedings (pp. 58-75). (Lecture Notes in Computer Science; Vol. 11428), (Theoretical Computer Science and General Issues). Springer. https://doi.org/10.1007/978-3-030-17465-1_4
van Dijk, T. , & van de Pol, J. (2018). Multi-core Decision Diagrams. In Y. Hamadi, & L. Sais (Eds.), Handbook of Parallel Constraint Reasoning (pp. 509-545). Springer. https://doi.org/10.1007/978-3-319-63516-3_13
van Dijk, T. , & van de Pol, J. (2018). Multi-core symbolic bisimulation minimisation. International journal on software tools for technology transfer, 20(2), 157-177. https://doi.org/10.1007/s10009-017-0468-z
van Dijk, T. , & van de Pol, J. (2017). Sylvan: multi-core framework for decision diagrams. International journal on software tools for technology transfer, 19(6), 675-696. https://doi.org/10.1007/s10009-016-0433-2

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Contactgegevens

Bezoekadres

Universiteit Twente
Faculty of Electrical Engineering, Mathematics and Computer Science
Zilverling (gebouwnr. 11), kamer 3067
Hallenweg 19
7522NH  Enschede

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Postadres

Universiteit Twente
Faculty of Electrical Engineering, Mathematics and Computer Science
Zilverling  3067
Postbus 217
7500 AE Enschede